(iTers News) - MIPS processor is one of the earliest RISC, or reduced instruction set computing instruction set architecture-based processor core. Pioneered by John L. Hennessy, founder of MIPS Technologies, Inc and professor of Stanford University in mid-1980s, the MIPS core is known to be the most powerful and the most power-efficient RISC instruction set architecture ever.

Yet, the MIPS processor has yet to live up to its fame, having failed to enter into mainstream , high-volume computing markets like mobile computing and PCs. While rival RISC architecture-based ARM core and Intel X-86 core have dominated mobile computing and PC markets, respectively, however, MIPS processor has been still on the sideline, just supplying embedded SoC, or system on chip market for networking and connectivity as well as TV and set-top-box, or STBs.

MIPS is back in the race for the mobile computing markets, as GPU giant Imagination Technologies acquired MIPS Technologies to enter into the CPU core market.

"MIPS is the most efficient processor architecture, as it is the first RISC that was created by John Hennessy, for example. Therefore, it is the most efficient processor, giving you silicon area advantage and power advantage. So, from the technology point of view, it is very strong, One of the key advantages of MIPS is that 64 bit and 32 bit instruction sets are ones that are completely compatible. So you can run 32 bit instruction sets directly on 64-bit machines, which is not the case with our competitors,” said Hossein Yassaie, CEO with Imagination Technologies.  

“MIPS has very strong position in embedded market, and is historically a strong player in the embedded market like connectivity and network. MIPS began a process getting into the mobile market. I think the power and energy is focused on relationship and openness of the mobile markets.  As Intel is succeeding, we believe that is a legitimate segment for us,” added he.

From a purely technical point of view, MIPS processor is indeed more power efficient and more sophisticated RISC architecture processor core than other competing processors, because it is one of the archetypes of RISC architecture. Compared with other followers like ARM and Intel X86 architecture-based processors, MIPS instruction set has little overhead.

Less complicated

For example, MIPS instruction set architecture is physically up to 50% smaller, or less complicated to achieve the same performance as the competition. As it uses fewer instructions than competitors do to perform the same task, it consumes less power, which is MIPS-based CPU, or SoC is very good for power consumption 

The binary compatibility between 32 bit and 64 bit processors is another key technology enabler that will better position MIPS core than competition in the race for mobile SoC markets. While rival ARM is now working on its first 64-bit ARM Cortex- A50 series processor for the roll out in late 2013, or early 2014 to gear itself for the arrival of 64-bit mobile computing era, 64-bit MIPS core has been around for more than 20 years. The backward compatibility with the 32 bit allow SoC chip makers to write the compiler software for 32-bit MIPS processor and then have it run on the 64-bit machine.

“I write software and I compile the binary for 32 bit processor and I will take the binary and it will run on the 64 bit machine I don’t need to recompile it. I don’t need any additional hardware for 64 bit machine to run on 32 bit code some competitors do. We are very efficient and binary compatibility is always on MIPS architecture It is another reason we are more sophisticated and better architecture because 64 bit will become very important very quickly, stressed Tony King vice –president with Imagination Technologies .

The compiler is a suite of software program that transform OS source core written high-level programming language into a binary of machine language. The performance of the compiler is the most related with the performance of a CPU

Imagination now has three legacy processor families of MIPS Technologies for mobile SoCs, including microAptive processor for low-end SoC market, interAptiv for mid-range, and proAptiv for high-end SoC solutions.

All the three families are a whole range of core portfolio from a single core to multi-core, while featuring multi-threading capability. The multi-threading is all about how a single core processor performs multiple tasks on virtual cores by sequencing instructions as if it were a multi-core processor.

Multithreading ; Virtual Cores

 As each thread within the processor core shares some computing resources like memory and data interface bus, it performs slightly less than multi-core equivalents, but consumes a lot less power. Unlike the multi-core processor that comes equipped with some logic circuitry to support coherency between cores and L2 cache controller, for example, the single core, multithreading processor comes no overhead hardware logic, boasting better power efficiency. The multi-threading is particularly good for mid-range real-time performances. Neither does it waste clock cycles.

Imagination has recently the smallest silicon footprint single core multi-threading member to its of interAptiv core family to target mid-range SoC market.  

The IP licensor of GPU, CPU, video codecs and RF CPU cores is also working on a next generation of MIPS architecture processor core codenamed as Series5 ‘Warrior’ processor core for mobile SoC solutions. 

With the first member of the Warrior processor family scheduled to be due out in late 2013, the family will also feature binary compatibility from entry-level low-end 32-bit all the way through up to high-end 64-bit processor, while implementing hardware virtualization. It has also multithreaded architecture, while implementing SIMD, single instruction multiple data  architecture, which is designed to do single same math like multiplication, or division on multiple data simultaneously. 

Open source OS comes to the rescue      

The change in the computing environment is also playing out in favor of MIPS architecture. As open source OS like Android and Linux is now proliferating, allowing multiple processor architecture to run on the same OS environment. Intel X-86 architecture-based CPU running Samsung’s Android tablet is just the case of how the mobile SoC and OS platform market is opened to various independent processor instruction set architecture.

As mobile markets for tablet PCs and smart phones are increasingly become mature, Imagination is particularly zeroing in on fast-growing low-cost smartphone market in the China.

“No industry likes sustained monopoly. When single company has a 90% and plus market share, it’s not sustainable. There is an expression for use in the U.K and U.S. that wherever Coke is, there is Pepsi. The reason we acquired MIPS is for us to compete in the all the markets relevant to CPU market that includes mobile and tablets., “ said  CEO Hossein Yassaie

Reported by JH Bae

Photos & Videos by JH Bae