The CrossLink product was designed to address the challenges of today’s rapidly changing I/O landscape by offering designers a new way to develop high performance, low power and compact bridging solutions. Since the product introduction less than a year ago, Lattice has seen strong interest from customers to expand beyond typical early applications of the CrossLink product for simple interface conversion, merging and muxing of image sensors, application processors and displays.
By optimizing existing IP, leveraging new IP and development platforms, along with additional resources, Lattice can offer more solutions for a greater variety of bridging applications that captures the best of both worlds with the combined the flexibility and fast time to market of an FPGA and the power and functional optimization of an ASSP.
“The new CrossLink IP and solutions will enable our customers to adopt cameras and displays with the latest mobile interface technology to reduce overall system cost, power and size, while accelerating the design cycle of their next-generation products,” said C.H. Chee, senior director of marketing, mobile & consumer division at Lattice Semiconductor. “As inventors of the first programmable bridging device, and the world’s fastest MIPI D-PHY bridging device, Lattice is committed to delivering a low cost bridging solution with the highest bandwidth, lowest power and smallest footprint.”
Key features of the new CrossLink pASSP IP solutions include:
New IPs
· One Input to One Output MIPI CSI-2 Camera Interface Bridge enables better connectivity and improved signal integrity over connectors, large PCBs and flex cabling. It also provides programmability for data packet repair or additional packet transmissions.
· One Input to Two Output MIPI CSI-2 Camera Splitter Bridge enables video data from a single image sensor to go to two sources.
· 4:1 MIPI CSI-2 Camera Aggregator Bridge allows four CSI-2 cameras to be connected to a single CSI-2 interface on the processor. Two image sensors are merged together in a left/right format. A GPIO pin can then multiplex between the two sets of merged image sensors.
New Technology Demonstration Platforms
· CMOS to MIPI CSI-2 Camera Bridging Demonstration
Connects a popular image sensor with MIPI DPI CMOS-type pixel bus to the CSI-2 input on the application processor
MIPI DSI to LVDS display bridging demonstration
Connects the applications processor to a Dual Link LVDS display
· MIPI DSI to LVDS Interface Bridging Demonstration
Connects mobile application processors to large format LVDS displays
Demonstrates the ability for industrial displays to interface to high volume, high performance mobile Application Processors.