Samsung Electronics has staked out RDL interposer and fan-out system-in-package technologies (FoSiP) as a next generation of cash cows for its foundry business.
Samsung’s focus on the new, novel cutting-edge packaging technologies is to appeal to its foundry customers, as the two packaging technologies will enable Samsung to undercut world’s foundry leader TSMC on technology.
Samsung will pack low-density SoC with RDL interposer technology, while its high-density application processors will come packed with FoSiP.
A short for redistributed layer, the RDL interposer packaging technology is one of a sort of 2.5D chip packaging technologies that are widely used to pack together different types of chip on a packaging substrate, squeezing interposers in between chip dies and substrates
The RDL is a sort of organic thin film that is fil-type interconnecting electric-conductive wires. The RDL is deposited on the interposer to interconnect these different type of chips like DRAMs, and CPUs, for example.
It is an underlying technology that is instrumental in developing today’s advanced packaging technologies like wafer-level packaging and TSV-based interposers and chip stacks.
As the RDL interposer technology costs less than TSV (through silicon via0-based silicon interposer technology, it is rapidly emerging as cheaper alternative to prohibitively expensive silicon interposer.
For example, it costs just one tenth that of silicon interposer, and it comes with no TSV.
The way to deposit the RDL is relatively straightforward. In the first place, you have to form, or deposit RDL on a carrier, and then place and bond chip dies on the RDL. The next step is to encapsulate all dies and carriers. Then, the carrier is detached from the RDL to grind and attach balls. All you have to do to finish the packaging processes is to mold a RDL interposer to the substrate.
Samsung believes that the RDL interposer chip packaging technology is a good fit for low-cost APs and high-performance computing SoC, which don’t mind form factors, but calls for as many IOs as possible.
On the way toward that goal, Samsung unveiled a mechanical sample RDL interposer chip package in the fourth quarter of 2018, which packs together 4 HBM or high bandwidth memory chips and one logic chip on a RDL interposer.
By 2025, Samsung plans to complete development of commercial version of RDL interposer chip packaging solutions technology, preparing itself to start commercial production on its own.
As shapes of RDL interposer vary from chips, it makes business sense to customize it on its own rather than outsourcing them to chip packaging companies
Samsung is also working on FoSiP packaging chip technologies that have memory chips and AP packing together next to each other in parallel using the RDL interposer technology.
With this FoSiP technology on hand, Samsung plans to pack one AP and six DRAM chips on a single package substrate, placing a set of 6 stacked DRAM chips and the AP next to each other.
6 DRAM chips are to be stacked one after another through silicon via hole. Then, the stacked set of 6 DRAM chips are placed next to an AP on the RDL interposer.
The parallel layout has an advantage over fan-out package-on-package, or Fo PoP technology in terms of heat dissipation, but has a con of bigger package size. .
The Fo PoP technology is used to stack DRAM chip dies on top of AP chip die and then fan out interconnecting wires to reduce heat dissipations. Yet, heat dissipation turns out to be less effective than Samsung’s FoSiP technology. For example, FoSiP technology boasts of 24% better heat dissipation than PoP technology. The better heat dissipation offsets its downside of larger package size.