(iTers News)- AI or machine learning technology is all about how to train or educate machines to learn knowledge on their own rights, trying to simulate the way that human brain works.
A little-known Korean company has recently fielded out a sort of NPU, or neuron processing unit or NPU chip in what the chip maker calls as practical AI enabler.
Dubbed as NM500, or neuromorphic 500, the NPU is a new breed of a single dedicated NPU-based AI chip that sets itself apart from other GPU-or CPU, and CNN-based AI chip predecessors like Intel’s Curie and Quark, enabling system builders to train it on field to learn knowledge and then create knowledge files.
It is also different from IBM’S SNN-based True North AI chip, which comes built with non-volatile phase change memory or PCM and a logic gate. Unlike most of other AI chip that is based on CNN, convolutional neuron network algorithm, the True North came built with SNN spiking neuron network algorithm, which fires memory data when it gets full with data.
What especially differentiate the NM500 from deep learning-based GPUs and other CNN-based AI chips are field trainability, local training, easy programmability, additive training, low power consumption, true parallelism, true real-time recognition, and so low data latency.
Crack open it, and you will find 567 neurons, or cells integrated on a single piece of silicon wafer. Each neuron comes built with one logic gate and one memory cell of 256 bytes, getting connected with each other in a true parallel way.
The chip is also partitioned into three context areas for motor, or actuator sensing, visual sensing, and auditory sensing. “Once trained with annotated data, our chip can help sensory machines to identify objects in great details extracting their features, or locating region of interests. For example, it can identify whether an object in question is a dog or a cat extracting their features,” said Jung Ho Ahn , senior vice president, Future Intelligence Business Unit with Nepes.
Added he, “The NM500 is a true technology enabler for cognitive computing and artificial intelligence.
Founded in December 1990, Nepes started out its business life as a chip-packaging maker and jumped into the chip-design business in 2017, taping out the first silicon sample of the NM500 AI chip in August 2017. Two months later in October, it had the engineering sample successfully tested through rigid and rugged industrial grade environments.
At the heart of the chip is an algorithm which is embedded in the logic gate. Jointly developed by Nepes and Silicon Valley-based General Vision of the U.S., the algorithm allows system builders to train, or set and port their already annotated data in the memory circuitry and then reference a stream of incoming sensing signals like image, video, audio, actuation, and text to the trained datasets to locate and identify differences between them.
It also can classify video, detect anomaly voice signals, cluster signals, track text, and do a template matching of data to allow users or machines to make a decision on what to do next.
The reference data sets is called “golden template”, which enables users to detect and identify differences or changes in the objects.
System builders also can create a new knowledge file, or datasets by gathering data through a series of image and voice-recognition sensors and then porting them into this chip.
The logic algorithm is a hardwired version of a radial basis function, or RBF software, a real-valued function whose value depends only on the distance from the origin. Sums of radial basis functions are typically used to approximate given functions. This approximation process can also be interpreted as a simple kind of neural network.
The NM500 is designed and fabricated by Nepes under a license agreement with General Vision of the U.S.
Applications vary from IoT to wearable devices to cars to machine visions to data centers. Cases in point are quality and product inspection across factory floor lines using a machine vision or IoT network. Once users' original data sets on quality requirement for products get loaded onto the memory sections of the NM500, be they silicon wafer dies or iron and steels, for example, users compare them with original data to certify whether they meet quality requirements, or not.
"Across all manufacturing floor lines, the final inspection is usually done visually. That’s one of the target applications that NM 500 zeros in on, as the chip can be field- trainable, ” said senior vice president Jung Ho Ahn.
Applications don’t stop there. It can be used to classify and sort out catching fishes on board to fishing ships by fish types.
Users can also categories and classifies photo library by genre, color, feature of object, and file name using this NM500 chip. For example, they can identify and sort out people clad in red clothes, or people with a winning smile among their photo library.
There are several types of NM 500 chip-embedded devices available from Nepes and its sales representatives, including SSD, solid state drive types called as Brilliant SSD for data centers and clouds and USB types called Brilliant USB. Other NM500-based system or board devices include , Neuro Tile board for IoT developers, Neuro Shield for prototype evaluation, NeuroBrick for neuron explanation, camera-embedded Prodigy Board for developments, and Cogito Instruments. The Cogito Instruments system is now being used with National Instruments’ testing and inspection platform.
The company also has lined up a platform and SDK called as Knowledge Studio, a where users or system builders can train the chip, or set and port their annotated data into the chip an verify them.
Knowledge Studio is a sort of OS-agnostic cross platform that are interoperable with Windows, Linux and Chrome OS, allowing users, even novices to easily program and train the chip.
“Easy field trainability is truly what set NM500 chip from other AI chip predecessors. Take for example AI chip from Movidius, a subsidiary of Intel Corp. Movidius;’s AI chip structure is similar to ours, but can’t be locally trained on the field. Instead, users have to get an access to Movidius’ neural network server to train the chip. The Movidius chip also has one outstanding flip flop, which calls for erasing all of existing data sets to program a new set of data,” explained senior vice president Ahn.
True enough, the NM 500 AI chip enables system builders or users to port a new set of sound or actuating data into the existing image data in what’s called as additive training to create a new set of knowledge.
By mixing image, sound, and actuating data into the chip, for example, the additive training really can help cars to detect and locate objects in more precise and detail ways not only to warn of impending collisions, but also better understand what’s going on in the neighborhood.
The NM500 can be also used in the sensor node of IoT network to replace signal processor chips or sensor fusion MCUs (micro-controllers) to process various sensing signals.
Indeed, that’s a niche application, because Nepes doesn’t need to write and offer a set of separate application software to make the chip work with certain applications. Once they get access to Nepes’ Knowledge Studio platform, it is a no brainer for users to program any applications on demand by themselves. On the other hands, fusion sensor MCUs maker have to write and provide applications software at users’ services.
Energy efficiency, precise object recognition, and low data latency are three more outstanding attributes of the NM500 chip. Object recognition or classification can be done in three ways –feature extraction for IoT and wearable applications, regional of interest, or ROI pinpointing for data analysis and finally raw data processing. As it can extract just features, or pinpoint peculiar regions of an object, it can not only reduce data amounts on demand, but also enhance recognition quality, or resolution. As with the case, it can recognize 100,000 objects per second for milli-watts for 1k neurons.
As a result, the chip just consumes 0.1 watts and its recognition latency is just below 8.5 micro -second.
The chip is also scalable, enabling the chip maker to pack more neurons depending on tasks on demand. Nepes is now trying to create its own ecosystem for the NM500 chip, inviting applications developers and partners to join to expand and explore new use cases. The NM500 is fabricated with 110nm design rule, coming in a wafer scale package or WSP.