(iTers News) -Samsung Electronics is to unveil a 3rd generation of 14nm FinFET mobile SoC chip process technology in what the chip maker said would undercut its current chip node technology on power consumption and costs.

The mobile SoC chip maker said today that it would develop a low-power compact, or LPC  14nm FinFET chip process technology soon.

The soon-to-be-released 14nm FinFET process is the 3rd generation variation following its rollout of a 1st generation 14nm low power early, or LPE FinFET in 2015 and 2nd generation of 14nm LPP, or low power plus process technology in early 2016.

The 2nd generation LPP consumes 15% less power than the first generation, and is being used to fabricate Exynos 8 octa-core CPU series and Qualcomm Snapdragon 820 SoC .

Due out soon, the 3rd generation LPC process technology is known to outperform the 2nd generation in costs and power consumption, as it uses less number or photo masks in the photo lithography process.

The chip has already started sample production of the 14nm FinFET process technology, Korean IT vernacular daily Electronics Times reported.

The complete line-up of its 14nm FinFET process technologies would better position Samsung to compete with world’s largest foundry maker to seize control of 14nm FinFET contract chip making foundry market.

TSMC has completed its 16nm FinFET process portfolio from 16nm FinFET  or FF to 16nm FinFET Plus to 16nm FinFET Compact.
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