(iTers News) -As cloud computing catches on, memory chip makers across the world are looking to data center server market for a new wave of growth engine, Kilopass Technology Inc. has a compelling reason for welcoming the shift in memory demand from PCs to mobile phones to data center servers. Its VLT for vertically layered thyristor technology is a sort of disruptive memory cell technology that threatens to displace current capacitor-based DRAM cells out of mainstream market.

kilopass_vlt-dram_press-conference_20161011_seoul-3



The VLT is an advanced variation of traditional thyristors, a tightly cross-coupled pair of NPN and PNP bipolar junction transistors that are a combination of N-type semiconductors and P-type semiconductors. The VLT forms a latch by forward-biasing and backward biasing electricity from anode and cathode, or moving from switch-on to switch-off states.

The latch is where electric charges, or a series of 0s and 1s are stored.

Unlike capacitor-based DRAM cells that have constantly refresh themselves not to lose data or electrical charges, the VLT doesn’t need to refresh itself.

kilopass_vlt-dram_press-conference_20161011_seoul-2



Refreshing capacitors at certain intervals drains tones of memory cycles and bandwidths, slowing down data read and write speed. This helps explain why CPUs have to wait for lots of cycles until DRAM chips boot up data or instructions, waste cycles. The penalties are unredeemable, retarding whole system performances. Especially when it comes to multi-core and multi-threaded datacenter server computers, the mismatch between the clock speed of CPUs and DRAM chips is too wide to be tolerable any more

“DRAM market is worth US$50 billion dollars, depending on fab capacity or ASPs for average selling prices. (There are) the two critical issues.  One of them is that mobile phone is no longer the growth engine for DRAM chips. Over the last ten years, it used to be a growth engine, but in the the next ten years, I believe it will be cloud computing. Dram revenues depends on cloud computing. Servers and data centers depend on cloud computing, and deep learning requires computing power. The problem of the traditional DRAM is that it requires refresh, and refresh takes bandwidth away from DRAM, “said Charlie Cheng, CEO with Kilopass Technology Inc.

29806231503_d88c5e5c5a_k



No capacitor, no refresh   

True enough, DRAM capacitor is a bandwidth-guzzler, aimlessly wasting cycles and powers. CPU cycles are also wasted, waiting helplessly until DRAM chips get into action to boot up data and instructions. As data center servers are especially requiring more of computational cycles to process a long stream of constantly changing visual image elements, the longer the wait state, the slower it performs data.

Data available from Kilopass shows that at 8Gb and 16Gb DRAM chips, the available bandwidth of net refresh is decreasing very rapidly. For example, up to 20% of a 16Gb DDR DRAM chip’ s raw bandwidth will be lost due to increased frequency of refresh cycles, according to Kilopass.

True enough, the memory chip industry stands at a technology inflection point of whether it goes head with the conventional 1 capacitor and 1 transistor-structured DRAM cell technology or not, as the industry’s chip processing technology is moving closer to 10nm and below.

At stake is the very nature and physics of its capacitor that stores data. As the industry keeps shrinking down the circuitry of DRAM cells, its capacitor gets smaller having less capacitance. To compensate for the capacitance loss, the   refresh interval time gets shorter, seeing DRAM chips helplessly wasting more of cycles, power, and more painfully lag far behind the CPU cycle.

29807239454_f1cd096dc8_k



Capacitor-based DRAM chips  pay too much penalties     

So, it gets increasingly tougher to scale down DRAM chips smaller than 10nm circuitry without compromising capacitance. This helps explain why memory chip makers are looking to MRAM or FRAM for a low power and high-speed DRAM replacement.

“Most advanced DRAM chips are now 1xnm-wide may be 18nm wide in its circuitry, but that is not moving down fast to provide customers’ requirements, “said Charlie Cheng

Take a 20nm circuitry DRAM chip for example, its transistor has a 30nmx 30nm dimension, but its capacitor is almost twice the size, measuring 55nm x 60nm x 1,100nm.

What’s worse is that it is 1,000nm tall, making it difficult to manufacture. The 3D NAND flash memory chip is also tall, but every circle stores 32 to 64 bits, but here every capacitor stores just a piece of data.

29806499693_2556462180_k



The VLT technology is very similar to traditional silicon wafer, but comes added with two implants - shallow N-type well and shallow P-type well. They form two bipolar transistors that are locked, or paired together to form memory cell latch. So it does not use any new materials like MRAM or RRAM. It is a 100% CMOS manufacturing process-compatible. Its physics is based on thyristors that were invented in 1050, and so, is very well known and silicon proven.

The thyristors is the fastest memory available on the market, taking just 10 picoseconds to turn on and off. Kilopass discovered that its standby power consumption is very slow because of that short intervals between on and off.

“That’s the physics that nobody realized until we discovered that,” CEO Charlie explained.

Another advantage is the big gap between current levels that represent 1s and Os, or on and off state, -so big that it is easy to detect even with simple signal sensing amplifier.

Smaller footprint, fewer mask steps translate into 45% cost cuts  

“The difference between on and off is one hundred millions times. So it is easy to design sensing amplifier and circuitry, because 0s and 1s are so clearly different,” added Charlie.

All combined, these excellent physics of the VLT translate into many manufacturing and operational advantages that can tackle technological challenges facing the memory chip industry.

For one thing, the VLT can replace the tall capacitor as a data storage place in the DRAM cell. As the silicon footprint of the VLT is almost as small as a DRAM transistor, it opens up the way for the industry to scale down to 16nm, 14nm, 10nm, and 7nm circuitry.

So, it cost less and easier to fabricate, while ensuring higher yield, compared with a capacitor-based DRAM.

The low standby power is an alluring feature that lures DRAM makers to turn to the VLT, as it consumes less power and then dissipate less heat. Given exorbitantly high electricity bill that data centers pay to cool down high temperature atmosphere, the lower standby power is a feature that data center server vendors are eager to buy.

29806231503_d88c5e5c5a_k-%eb%b3%b5%ec%82%ac%eb%b3%b8-2



Lower cost is another advantage. Generally, the VLT-based DRAM costs 45% less than DRAM chips to fabricate, because it occupies just 4.5F2, while the 1 transistor-and one capacitor-structured DRAM takes up 6F2.   

Its macro efficiency is 75%, more than efficient that traditional DRAM’s 65%, too. It takes fewer masks to fabricate, using just 40 masks, compared with 60 masks that DRAM chips require.

Protective licensing ; license to select few   

All combined, smaller silicon real estate, high macro efficiency and fewer mask costs helped to cut fabrication costs by that 45% margin.

Kilopass fabricated a test chip of VLT-based 8Gb DRAM chip to compare the size with a 20nm traditional one capacitor-and one transistor-based 8Gb DRAM. The VLT turns out to be 31% smaller, just occupying 38.64 square mm.

29806231503_d88c5e5c5a_k-%eb%b3%b5%ec%82%ac%eb%b3%b8-3



Its manufacturing compatibility with today’s mainstream CMOS fabrication ecosystem works in favor of the VLT, too.

“What make VLT technology different is that because it does not require a capacitor, customers can use our VLT technology and quickly go down and leverage their CMOS technology excellence. The VLT is very unique but it does not use anything new, it uses all the existing materials that is in and done inside the fab already. There’s no change in the physics, we just use a different device, ,“said CEO Charlie.

Added he, “We develop very fast device simulator that allows us to stimulate very fast (1,000 time faster). As a result, we have done over 30 difficult tests, we test all 2 key manufacturing parameters in temperature corners, voltage corners to guarantee that our licensees can go into manufacturing with 20 to 30nm process technology. And they know their yield and manufacturing window target 15 months before they start.”

29806231503_d88c5e5c5a_k-%eb%b3%b5%ec%82%ac%eb%b3%b8-4



Kilopass plans to avail itself of the well-established and matured DRAM ecosystem. The prior target market will be industry standard-based market like PCs and servers. Then, the company will jump into embedded and mobile memory chip market, leveraging the unique benefits of the VLT technology.

As unique is its licensing policy.  Kilopass is going to use what’s called as “Protective Licensing”, under which it will license its technology to a very select few of qualified makers. That is not to make VLT-based DRA market a commodity one to ensure that  there will be  no price war or collapse of ASP.

저작권자 © KIPOST(키포스트) 무단전재 및 재배포 금지